报告人：Prof. Eby G. Friedman, IEEE Fellow, Rochester

题 目：Research Challenges in High Performance VLSI Circuits

时 间：2018年4月24日（周二）下午2:00-4:00

地 点：微电子楼401会议室

邀请人：孙亚男

Abstract:

The intention of this presentation is to provide an overview of the different projects of current focus in the high performance integrated circuit design research laboratory at the University of Rochester. Each of these topics considers different aspects of the systems integration process, with a focus on lower physical and circuit level aspects. Emphasis is placed on those fundamental challenges in delivering performance to high speed, high complexity heterogeneous integrated circuits. Technologies range from deeply scaled CMOS to emerging devices and circuits such as spintronic, photonic, and superconductive behaviors.

Delivering high quality power to on-chip circuitry with minimum energy loss is a fundamental objective of all modern integrated circuits (ICs). To supply sufficient power on-chip, an unregulated DC voltage is usually stepped down and regulated within the power delivery system. Power conversion and regulation resources should be efficiently managed to supply high quality power with minimum energy losses within multiple on-chip power domains. To satisfy challenging power efficiency and regulation requirements, hundreds of power regulators will be co-designed with many thousands of decoupling capacitors, distributing the power locally to billions of on-chip loads. Circuits, algorithms, and design methodologies are being developed to fundamentally change the manner in which power is delivered on-chip.

Three-dimensional (3-D) integration is changing the path for device scaling, supporting the delivery of multi-faceted heterogeneous systems. A variety of different design techniques and methodologies are under development to better design, model, architect, and build 3-D systems. Several test circuits have been developed to evaluate some of the key issues in 3-D system integration. These efforts will be reviewed and trends discussed.

Spintronic circuits have the potential to enhance CMOS in several dimensions, particularly as non-volatile memory and novel non-von Neumann structures. A variety of models and circuits will be described and placed within a CMOS perspective.

The energy expended in server farms has become an issue of seminal significance. CMOS simply expends too much energy to scale the size and number of these farms to support expected needs. An ultra-low energy technology is needed. One possible technology is superconductive single flux quantum (SFQ) circuits. This technology will be briefly reviewed, and novel design methodologies will be described to support the development of large scale Josephson junction based integrated systems.

Biography:

Eby G. Friedman received the B.S. degree from Lafayette College in 1979, and the M.S. and Ph.D. degrees from the University of California, Irvine, in 1981 and 1989, respectively, all in electrical engineering.

From 1979 to 1991, he was with Hughes Aircraft Company, rising to the position of manager of the Signal Processing Design and Test Department, responsible for the design and test of high performance digital and analog integrated circuits. He has been with the Department of Electrical and Computer Engineering at the University of Rochester since 1991, where he is a Distinguished Professor, and the Director of the High Performance VLSI/IC Design and Analysis Laboratory. He is also a Visiting Professor at the Technion - Israel Institute of Technology. His current research and teaching interests are in high performance synchronous digital and mixed-signal microelectronic design and analysis with application to high speed portable processors, low power wireless communications, and power efficient server farms.

He is the author of more than 500 papers and book chapters, 16 patents, and the author or editor of 18 books in the fields of high speed and low power CMOS design techniques, 3-D design methodologies, high speed interconnect, and the theory and application of synchronous clock and power distribution networks. Dr. Friedman is the Editor-in-Chief of the Microelectronics Journal, a Member of the editorial boards of the Journal of Low Power Electronics and Journal of Low Power Electronics and Applications, and a Member of the technical program committee of numerous conferences. He previously was the Editor-in-Chief and Chair of the Steering Committee of the IEEE Transactions on Very Large Scale Integration (VLSI) Systems, the Regional Editor of the Journal of Circuits, Systems and Computers, a Member of the editorial board of the Proceedings of the IEEE, IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, IEEE Journal on Emerging and Selected Topics in Circuits and Systems, Analog Integrated Circuits and Signal Processing, and Journal of Signal Processing Systems, a Member of the Circuits and Systems (CAS) Society Board of Governors, Program and Technical chair of several IEEE conferences, and a recipient of the IEEE Circuits and Systems Charles A. Desoer Technical Achievement Award, a University of Rochester Graduate Teaching Award, and a College of Engineering Teaching Excellence Award. Dr. Friedman is a Senior Fulbright Fellow and an IEEE Fellow.

Prof. Friedman还将提供其他两场讲座：

Lecture 1：时间：4月23日（周一）下午2:00-3:00, 地点：陈瑞球楼211，topic: 3-D Integration

Lecture 2：时间：4月25日（周三）下午2:00-3:00, 地点：陈瑞球楼211，topic: High Performance Clock Distribution

Research Challenges in High Performance VLSI Circuits